Large area a-Si/Si nanowire hybrid solar cells


Raychaudhuri, S.; Lujan, R. A.; Song, K. W.; Paulson, C.; Street, R. A. Large area a-Si/Si nanowire hybrid solar cells. Nanotech Conference and Expo; 2011 June 13-16; Boston, MA.


Amorphous silicon (a-Si) provides a well established, scalable platform for large area electronics making it a good candidate for producing low cost, large area photovoltaics. In planar photovoltaic structures increasing the thickness of the device will increase the absorption efficiency of the material but will reduce the carrier collection efficiency. This design trade-off places a practical limitation on planar a-Si photovoltaic devices which prevents them from efficiently absorbing light in the longer wavelengths. In order to address this issue we have devised a scheme where a thin a-Si solar cell is deposited over a disordered nanowire mat. The disordered geometry of the mat scatters light causing a photon to interact with multiple nanowires increasing the probability that it will be absorbed. Thus the nanowire mat makes it possible to improve absorption efficiency of a-Si cell without compromising the carrier collection efficiency resulting in enhanced absorption at the longer wavelengths. We have fabricated and studied these a-Si/Si nanowire hybrid devices. The mats are grown using the VLS technique with nanowire lengths of 5-10 microns. The nanowires are coated with 100-400 nm a-Si PIN solar cell structures. Top contact is achieved by using a transparent conducting oxide. We will present electrical and optical characterization data demonstrating solar cell operation of these advanced geometries. Our current device designs show a 10 fold increase in the absorption of red/infrared light (>700 nm) over comparable planar devices. We will discuss how different mat geometries affect device performance. We will also discuss the challenges in fabricating and optimizing these devices for efficient operation. Our experiments focus on device geometries that can be fabricated using techniques that are compatible with current a-Si processing technologies.

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