In this paper we present Hyper-Dimensional Reconfigurable Analytics at the Tactical Edge using low-SWaP embedded hardware that can perform real-time reconfiguration at the edge leveraging non-MAC deep neural nets (DNN) combined with hyperdimensional (HD) computing accelerators.
We review HyDRATE, a low-SWaP reconfigurable neural network architecture developed under the DARPA AIE HyDDENN (Hyper-Dimensional Data Enabled Neural Network) program.
In this paper, we describe the algorithmic steps taken in the processing pipeline to quickly create a global image database of an entire advanced IC.
This paper describes an architecture framework using heterogeneous hardware accelerators for embedded vision applications.
SRI’s new NV-CMOS™ image sensor technology is designed to capture images over the full range of illumination from bright sunlight to overcast starlight.
Stereo Vision processing is a critical component of Augmented Reality systems that rely on the precise depth map of a scene to properly place computer generated objects with real life video.
In this paper, we present a low-power, high performance FPGA implementation of a stereo algorithm suitable for embedded real-time platforms.
This paper proposes an overhauled method of exposure fusion that solves the exposure and focus problems simultaneously, achieving a well-exposed, all-in-focus result.
We proposed an algorithmic approach using a mask pyramid to better localize the selection process. A new embedded system architecture that builds upon the Acadia ® II Vision Processor is proposed.